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This course is designed to teach you one of the hardware description language(VHDL LANGUAGE). VHDL can be used for documentation, verification, and synthesis of large digital designs. This is actually one of the key features of VHDL, since the same VHDL code can achieve all three of these goals, thus saving a lot of effort and reducing the introduction of errors between: translating a specification into an implementation. You'll learn about such fundamentals as: - Introduction to VHDL.
- Different design methodologies (e.g. top-down design, library based bottom-up design, etc).
- Different approaches to describing hardware (structural, data flow, and behavioural methods).
- Lexical Elements, Data types, objects .
- Expressions and Operators.
- Sequential Statements (if statement, for loop, case statement …etc).
- Subprograms and Packages.
- Design Units and Libraries.
- Introduction to altera maxplus2 software (modelling, simulaton, synthesis).
- Complete Design Example.
- Advanced VHDL (. Signal Resolution and Buses,etc).
- finally we will build a simple processor with few instructions set as an example to illustrate the pervious topics.
Prerequisites: The course assumes that students have knowledge of logic gates , Boolean expressions, bit wise operations, hexadecimal system, binary system, small programming idea , it is not required to have any knowledge about vhdl or maxplus2 (this is our goal).
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